Disk subsystem and a method for controlling the disk subsystem

ABSTRACT

A plurality of magnetic disks are connected to a disk controller A through a fiber switch A and a fiber switch C. A disk controller B is connected to the plurality of magnetic disks through a fiber switch B and a fiber switch D. Access paths on the side of disk controller A and on the side of disk controller B are each interrupted by using associated fiber switches and a new disk controller is added between the fiber switches.

CROSS-REFERENCE TO RELATED APPLICATIONS

[0001] The entire disclosure of Japanese Patent Application No.2002-104647 filed on Apr. 8, 2002 by which the conventional right ofpriority of the present application is claimed is incorporated herein byreference.

FIELD OF THE INVENTION

[0002] The present invention relates to a disk subsystem and moreparticularly, to a technique of adding a disk controller withoutstopping the system.

BACKGROUND OF THE INVENTION

[0003] In recent years, a magnetic disk interface inside a disksubsystem has shifted, as a substitution for a conventional interfacecalled SCSI, to an FC-AL interface operative at a higher speed andconnectable with many devices. However, because of the ability to beconnected with many devices, the throughput of paths as a whole issaturated as the number of devices increases.

[0004] U.S. Pat. No. 5,905,995 discloses a technique of achieving loadbalance in such an event by shifting data to a device associated with apath less loaded.

SUMMARY OF THE INVENTION

[0005] In the case of the known system as above, however, much time isrequired for shifting of data.

[0006] In case a controller is added to cause the added controller tocontrol part of devices with a view to decreasing the throughput of thewhole of paths, it has hitherto been necessary to add the controllerafter stopping the system and update information about the constructionof the system.

[0007] Stoppage of the system can be unneeded if the load balance isachieved by shifting data as described in U.S. Pat. No. 5,905,995 butconversely, much time is required to shift the data.

[0008] It is an object of the present invention to provide, in a diskcontrol system for connecting a plurality of magnetic disk drives to adisk controller by means of FC-AL interfaces and controlling theplurality of magnetic disk drives, a technique of quickly adding a diskcontroller without stopping the system to improve the performance.

[0009] In a disk subsystem of the present invention, a plurality ofmagnetic disk drive groups are connected to two systems of access pathand disk controller and each access path not only has a plurality ofswitch modules having the function to interrupt input/output of datato/from the disk drive group but also has the function to interruptinput/output of data between the switch modules.

[0010] In the aforementioned disk subsystem, after interrupting datainput/output between the magnetic disk drives and between the switchmodules by using switch modules associated with an access path on oneside, a new disk controller is added between the switch modules, andswitches that have been interrupted are reconnected. At that time, theconstruction information is changed in accordance with the addition ofthe controller. Further, a new disk controller is added to an accesspath on the other side through the same procedures, thereby ensuringthat the new disk controllers can be added to the access pathsassociated with the magnetic disk drives without downing the system.

[0011] According to the disk subsystem of the invention, the new diskcontrollers can be added without stopping the system during systemworking to improve the performance.

[0012] Other objects, features and advantages of the invention willbecome apparent from the following description of the embodiments of theinvention taken in conjunction with the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Preferred embodiments of the present invention will now bedescribed in conjunction with the accompanying drawings, in which:

[0014]FIG. 1 is a conceptive diagram showing an example of theconstruction of a magnetic disk subsystem according to an embodiment ofthe invention;

[0015]FIG. 2 is a diagram showing an example of the constructionsubordinate to disk controllers in the FIG. 1 magnetic disk subsystemaccording to an embodiment of the invention.

[0016]FIG. 3 is a diagram useful to explain a process of adding a diskcontroller in the FIG. 2 embodiment of the invention.

[0017]FIG. 4 is a diagram useful to explain the disk controller addingprocess in the FIG. 2 embodiment of the invention.

[0018]FIG. 5 is a diagram useful in explaining the disk controlleradding process in the FIG. 2 embodiment of the invention.

[0019]FIG. 6 is a diagram useful in explaining the disk controlleradding process in the FIG. 2 embodiment of the invention.

[0020]FIG. 7 is a diagram useful in explaining the disk controlleradding process in the FIG. 2 embodiment of the invention.

[0021]FIG. 8 is a diagram useful in explaining the disk controlleradding process in the FIG. 2 embodiment of the invention.

[0022]FIG. 9 is a table showing an example of status type of diskcontrollers in the FIG. 2 embodiment of the invention.

[0023]FIG. 10 is a table showing an example of status type of diskcontrollers during the disk controller adding process in the FIG. 2embodiment of the invention.

[0024]FIG. 11 is a table showing an example of status type of diskcontrollers during the disk controller adding process in the FIG. 2embodiment of the invention.

[0025]FIG. 12 is a table showing an example of status type of diskcontrollers during the disk controller adding process in the FIG. 2embodiment of the invention.

[0026]FIG. 13 is a table showing an example of status type of diskcontrollers during the disk controller adding process in the FIG. 2embodiment of the invention.

[0027]FIG. 14 shows an example of a table of conversion between logicalblock position and physical block position in the FIG. 2 embodiment ofthe invention.

[0028]FIG. 15 shows an example of a logical block position-physicalblock position conversion table during the disk controller addingprocess in the FIG. 2 embodiment of the invention.

[0029]FIG. 16 shows an example of a logical block position-physicalblock position conversion table during the disk controller addingprocess in the FIG. 2 embodiment of the invention.

[0030]FIG. 17 is a flowchart of the disk controller adding process inthe FIG. 2 embodiment of the invention.

DESCRIPTION OF THE EMBODIMENTS

[0031] Embodiments of the invention will now be described in greaterdetail with reference to the accompanying drawings.

[0032]FIG. 1 shows the overall construction of a disk subsystemillustrative of an embodiment of the invention. A single pair of channelcontroller A 1101 and channel controller B 1201 are connected to asingle host computer 1001 or a plurality of pairs of channel controllerA 1101 and channel controller B 1201 are connected to a plurality ofhost computers 1001.

[0033] A single pair of disk controller A 1131 and disk controller B1231 are connected to a single memory device 1301 through a fiber switchA 1141 and a fiber switch B 1241, respectively, or a plurality of pairsof disk controller A 1131 and disk controller B 1231 are connected to aplurality of memory devices 1301 through the respective fiber switches A1141 and the respective fiber switches B 1241. The paired diskcontroller A 1131 and B 1231 are connected further to a single or aplurality of memory devices 1601 through a fiber switch C 1441 and afiber switch D 1541, respectively, or through the respective fiberswitches C 1441 and the respective fiber switches D 1541. Used as aninput/output interface between the disk controller and the memory deviceis an FC-AL interface.

[0034] Input/output data transmitted/received to/from the host computer1001 is temporarily stored in cache memories 1111 and 1211. Each of thecache memories 1111 and 1211 uses two planes to assure redundancy. Thecache memories 1111 and 1211 are connected to the channel controller A1101 through cache switches A 1121 and 1122. The cache memories 1111 and1211 are also connected to the channel controller B 1201 through cacheswitches B 1221 and 1222. Further, the cache memories 1111 and 1211 areconnected to the disk controller A 1131 through the cache switches A1121 and 1122 and are connected to the disk controller B 1231 throughthe cache switches B 1221 and 1222.

[0035] Communication between the channel controller A 1101 and the diskcontroller A 1131 and that between the channel controller B 1201 and thedisk controller B 1231 are carried out through common memories (sharedmemories) 1112 and 1212. The common memories 1112 and 1212 are connectedto the channel controller A 1101 through the cache switches A 1121 and1122 and are connected to the channel controller B 1201 through thecache switches 1221 and 1222. The common memories 1112 and 1212 are alsoconnected to the disk controller A 1131 through the cache switches 1121and 1122 and are connected to the disk controller B 1231 through thecache switches B 1221 and 1222.

[0036] When the channel controller A 1101 receives a data read requestfrom the host computer 1001, it writes a command “read data from a blockposition (hereinafter referred to as a logical block) requested by thehost computer and write the data in a cache” into the common memory 1112or 1212 through the cache switch A 1121 or 1122. After the diskcontroller A 1131 or disk controller B 1231 has practiced conversionbetween logical block and physical block, it recursively monitors thecommon memories 1112 and 1212 to check if there is a command toinput/output data to/from a memory device block position (hereinafterreferred to as a physical block) connected to its own. When recognizingthat the command “read data from a logical block requested by the hostcomputer and write the data into a cache” is written in the commonmemory 1112 or 1212, the disk controller A 1131 or disk controller B1231 carries out the logical-physical block conversion and confirms ifan FC-AL interface connected to the memory device 1301 or 1601 describedin the command is not registered as a blocked port in the common memory1112 or 1212. In case the FC-AL interface is not registered as a blockedport, the disk controller A 1131 reads data from the memory device 1301or 1601 through the fiber switch A 1141 or fiber switch C 1441 or thedisk controller B 1231 reads data from the memory device 1301 or 1601through the fiber switch B 1241 or fiber switch D 1541. The diskcontroller A 1131 writes the data into the cache memory 1111 or 1211through the cache switch A 1121 or 1122 or the disk controller B 1231writes the data into the cache memory 1111 or 1211 through cache switchB 1221 or 1222. Then, the disk controller A 1131 or disk controller B1231 writes a “read end” report in the common memory 1112 or 1122through the cache switch A 1121 or 1122 or the cache switch B 1221 or1222. The channel controller A 1101 recursively monitors the commonmemories 1112 and 1212 through the cache switches A 1121 and 1122 tocheck if read operation ends. When recognizing that a “read end” reportis described in the common memory 1112 or 1212, the channel controller A1101 transfers the requested data stored in the cache memory 1111 or1211 to the host computer 1001 through the cache switch A 1121 or 1122.

[0037] When the channel controller B 1201 receives a data write requestfrom the host computer 1001, it writes data of the host computer 1001into the cache memories 1111 and 1211 through the cache switches B 1221and 1222. Thereafter, the channel controller B 1201 writes a command“data write” into the common memory 1112 or 1212 through the cacheswitch B 1221 or 1222. When the disk controller A 1131 or diskcontroller B 1231, which practices the logical-physical block conversionand thereafter recursively monitors the common memories to check ifthere is an input/output command to/from a physical block of a memorydevice connected to its own, recognizes that the “data write” command iswritten in the common memory 1112 or 1212, it reads data from the cachememory 1111 or 1211 through the cache switch A 1121 or 1122 or the cacheswitch B 1221 or 1222 and following the logical-physical conversion,confirms if an FC-AL interface connected to the memory device includingthe physical block is not registered as a blocked port. In case theinterface of interest is not registered as a blocked port, the diskcontroller A 1131 or disk controller B 1231 writes the data into thememory device 1301 or 1601 through the fiber switch A 1141 or C 1441 orthrough the fiber switch B 1241 or D 1541.

[0038] Referring to FIG. 2, part of the construction shown in FIG. 1that is subordinate to a pair of disk controllers will be described.

[0039] A disk controller A 2101 is connected to an FC-AL interfaceconnector 2202 of fiber switch 2201 through an FC-AL interface 2502 forperforming paired one-way transmission. The fiber switch 2201 includes asingle or a plurality of bypass switches 2211 to 221 n which areconnected to magnetic disks Al 2401 to An 240 n, respectively, throughFC-AL interfaces 2601 to 260 n, respectively. The individual bypassswitches 2211 to 221 n are connected to a switching bus 2204. The diskcontroller A 2101 is connected to the switching bus 2204 through aswitching bus interface 2501. The disk controller A 2101 controls theswitching bus 2204 to change the bypass status of the bypass switches2211 to 221 n, thus making it possible to interrupt a signal flow to theFC-AL interfaces 2601 to 260 n connected to the magnetic disks Al 2401to An 240 n. The fiber switch 2201 also includes a bypass switch 2203.With the bypass switch 2203 closed outward, the fiber switch 2201 can beconnected to another fiber switch 2241 through an FC-Al interface 2504and a switching bus interface 2503. The fiber switch 2241 includes asingle or a plurality of bypass switches 2251 to 225 n which areconnected to magnetic disks B1 2411 to Bn 241 n, respectively, throughFC-AL interfaces 2621 to 262 n. The individual bypass switches 2251 to225 n are connected to a switching bus 2244. The disk controller A 2101is connected to the switching bus 2244 through the switching businterface 2501, switching bus 2204 and switching bus interface 2503. Thedisk controller A 2101 controls the switching bus 2244 to change thebypass status of the bypass switches 2251 to 225 n, thus making itpossible to interrupt a signal flow to the FC-AL interfaces 2621 to 262n connected to the magnetic disks B1 2411 to Bn 241 n. Similarly, a diskcontroller B 2111 is connected to an FC-AL interface connector 2222 offiber switch 2221 through an FC-AL interface 2512 for paired one-waytransmission. The fiber switch 2221 includes a single or a plurality ofbypass switches 2231 to 223 n which are connected to the magnetic disksAl 2401 to An 240 n, respectively, through FC-AL interfaces 2611 to 261n, respectively. The individual bypass switches 2231 to 223 n areconnected to a switching bus 2224. The disk controller B 2111 isconnected to the switching bus 2224 through a switching bus interface2511. The disk controller B 2111 changes the bypass status of the bypassswitches 2231 go 223 n, thus making it possible to interrupt a signalflow to the FC-AL interfaces 2611 to 261 n connected to the magneticdisks Al 2401 to An 240 n. The fiber switch 2221 also includes a bypassswitch 2223 and with this bypass switch closed outward, the fiber switch2221 can be connected to another fiber switch 2261 through an FC-ALinterface 2514 and a switching bypass interface 2262. The fiber switch2261 includes a single or a plurality of bypass switches 2271 to 227 nwhich are connected to the magnetic disks B1 2411 to Bn 241 n,respectively, through FC-AL interfaces 2631 to 263 n, respectively. Theindividual bypass switches 2271 to 227 n are connected to a switchingbus 2264. The disk controller B 2111 is connected to the switching bus2264 through the switching bus interface 2511, switching bus 2224 andswitching bus interface 2513 and it changes the bypass status of thebypass switches 2271 to 227 n so as to make it possible to interrupt asignal flow to the FCAL interfaces 2631 to 263 n connected to themagnetic disks B1 2411 to Bn 241 n.

[0040] Referring to FIG. 9, there is illustrated control informationindicative of status information for each disk controller. The controlinformation includes mounting information as to whether the diskcontroller is mounted and status indicative of the operating status andis stored in the common memories 1112 and 1212 shown in FIG. 1. In theconstruction status of FIG. 2, the disk controller A is mounted toexhibit normal status, the disk controller B is also mounted to exhibitnormal status, a disk controller A′ is not mounted to exhibit blockedstatus and a disk controller B′ is not mounted to exhibit blockedstatus.

[0041] Referring to FIG. 14, there is illustrated an example of a tablefor conversion between logical block position and physical blockposition in the construction status of FIG. 2. The present table isstored in the common memories 1112 and 1212 shown in FIG. 1.

[0042] Referring to FIG. 17, there is illustrated a flowchart showingthe sequence of maintenance operation for adding a controller to a drivein operation. Firstly, in step 5001, the status of disk controller A2101 stored in the common memories 1112 and 1212 is changed to“mounted-blocked” as shown in FIG. 10 to prevent the disk controller A2101 side from receiving an I/O request. Next, in step 5002, the bypassswitches 2211 to 221 n and 2251 to 225 n are opened as shown in FIG. 3to interrupt signals from the drive A1 2401 to drive An 240 n and fromthe drive B1 2411 to drive Bn 241 n and the fiber switch 2203 is closedinward to interrupt signals between the fiber switch 2241 and the fiberswitch 2201. Then, in FIG. 3, the switching bus interface 2503 and FC-ALinterface 2504 are removed in the step 5002, and a disk controller A′2121 shown in FIG. 4 is added and connected to the fiber switch 2241 byusing a switching bus interface 2523 and an FC-AL interface 2524 (step5003).

[0043] In case the fiber switch 2241 has the function to connect twosystems of disk controller or fiber switch, only a disk controller ofone system may be connected and in this construction, input/output ofdata transfer to/from the plurality of memory devices A and theplurality of memory devices B may be interrupted by means of a switchcircuit and thereafter, a controller of the other system may beconnected, thereby completing addition of the disk controllers.

[0044] Subsequently, in step 5004, the logical block position-physicalblock position conversion table stored in the common memories 1112 and1212 is updated as shown in FIG. 15 in order that the controller typecorresponding to logical block positions 10000000 to 1000000m and100n0000 to 100n000m can be changed from A to A′. Then, in step 5005,the fiber switches 2211 to 221 n and fiber switches 2251 to 225 n areclosed as shown in FIG. 5 to release the bypasses associated with thedrive A1 2401 to An 240 n and the B1 2411 to Bn 141 n. Thereafter, instep 5006, the attribute of the controller A 2101 stored in the commonmemories 1112 and 1212 of FIG. 1 is changed to “mounted-normal” as shownin FIG. 11 and the status of the controller A′ 2121 is changed to“mounted-normal”, thereby placing the controller A and controller A′ inusable condition.

[0045] Next, in step 5011, the status of disk controller B 2111 storedin the common memories 1112 and 1212 is changed to “mounted-blocked” asshown in FIG. 12. Then, in step 5012, the bypass switches 2231 to 223 nand 2271 to 227 n are opened as shown in FIG. 6 to interrupt signalsto/from the drives A1 2401 to An 240 n and B1 2411 to Bn 241 n and thefiber switch 2223 is closed inward to interrupt signals between thefiber switch 2221 and the fiber switch 2261. Thereafter, in the step5012, the switching bus interface 2513 and FC-AL interface 2514 areremoved in FIG. 6, and a disk controller B′ 2131 shown in FIG. 7 isadded and connected to the fiber switch 2261 by using a switching businterface 2533 and an FC-AL interface 2534 (step 5013). At that time, ifthe fiber switch 2261 has the function to connect two systems of diskcontroller or fiber switch, only a controller of one system may beconnected and in this construction, input/output of data transferto/from the plurality of memory devices A and the plurality of memorydevices B may be interrupted by means of a switch circuit andthereafter, a controller of the other system may be connected, thuscompleting the addition of the disk controllers. Next, in step 5014, thelogical block position-physical block position conversion table storedin the common memories 1112 and 1212 shown in FIG. 1 is updated as shownin FIG. 16 in order that the controller type corresponding to logicalblock positions 10000000 to 1000000m and 100n0000 to 100n000m is changedfrom B to B′. Subsequently, in step 5015, the fiber switches 2231 to 223n and fiber switches 2271 to 227 n are closed as shown in FIG. 8 torelease the bypasses for the drive A1 2401 to An 240 n and B1 2411 to Bn241 n. Then, in step 5016, the status of controller B 2111 stored in thecommon memories of FIG. 1 is changed to “mounted-normal” and the statusof controller B′ 2131 is changed to “mounted-normal”, thus placing thecontroller B and controller B′ in usable condition.

[0046] It should be further understood by those skilled in the art thatalthough the foregoing description has been made on embodiments of theinvention, the invention is not limited thereto and various changes andmodifications may be made without departing from the spirit of theinvention and the scope of the appended claims.

1. A disk subsystem comprising: a plurality of first and second memorydevices for storing data; first and second disk controllers forcontrolling said plurality of first and second memory devices; a cachememory for temporarily holding data to be stored in said plurality offirst and second memory devices; a common memory for storing controlinformation having mounting status information and operating statusinformation concerning said first and second disk controllers; first andsecond channel controllers connected to a host computer to controlinput/output interfaces to/from said host computer; a first cache switchconnected to said first disk controller, cache memory, common memory andfirst channel controller; a second cache switch connected to said seconddisk controller, cache memory, common memory and second channelcontroller; a first switch circuit connected to one of said plurality offirst memory devices and said first disk controller; a third switchcircuit connected to one of said plurality of second memory devices andsaid first switch circuit; a second switch circuit connected to saidfirst one of said plurality of memory devices and said second diskcontroller; a fourth switch circuit connected to said second one of saidplurality of memory devices and said second switch circuit; and a thirddisk controller to be added to said third switch circuit during workingof said disk subsystem.
 2. A disk subsystem according to claim 1,wherein with said third disk controller added, said operating statusinformation of said third disk controller is set.
 3. A disk subsystemaccording to claim 2, wherein when said operating status information ofsaid first disk controller is changed to information indicative ofblocking and said first disk controller stops receiving an accessrequest from said host computer, said third disk controller makes readyfor its addition to said disk subsystem.
 4. A disk subsystem accordingto claim 3, wherein when disconnecting said first switch circuit fromsaid third switch circuit and connecting said third disk controller tosaid third switch circuit, said mounting status information of saidthird disk controller is set with information indicative of mounting andsaid operating status information of said third disk controller is setwith information indicative of normal to let said third disk controllerusable in said disk subsystem.
 5. A disk subsystem according to claim 4,wherein when said first switch circuit and said third switch circuitstop interchanging signals to/from said plurality of first and secondmemory devices, signal interchange between said first switch circuit andsaid third switch circuit is stopped, said first switch circuit isdisconnected from said third switch circuit, said third disk controlleris connected to said third switch circuit and then said first switchcircuit and said third switch circuit start to interchange signalsto/from said plurality of first and second memory devices, therebycompleting connection of said third disk controller to said third switchcircuit.
 6. A disk subsystem according to claim 5 further comprising: afirst inter-switch interface used for interchange of signals betweensaid first switch circuit and said third switch circuit; and a secondinter-switch interface used for interchange of data between said firstswitch circuit and said third switch circuit, wherein said third switchcircuit has the function to connect two systems of disk controller orswitch circuit; said third switch circuit is connected to said firstswitch circuit and third disk controller; said first inter-switchinterface is used for disconnecting said first switch circuit from saidthird switch circuit; and said second inter-switch interface isconnected to said third disk controller so as to be used forinterchanging data to/from said third disk controller.
 7. A disksubsystem according to claim 4, wherein when said operating statusinformation of said second disk controller is changed to informationindicative of blocking and said second disk controller stops receivingan access request from said host computer, a fourth disk controllermakes ready for addition to said disk subsystem.
 8. A disk subsystemaccording to claim 7, wherein when disconnecting said second switchcircuit from said fourth switch circuit and connecting said fourth diskcontroller to said fourth switch circuit, said mounting statusinformation of said fourth disk controller is set with informationindicative of mounting and said operating status information of saidfourth disk controller is set with information indicative of normal tothereby let said fourth disk controller usable in said disk subsystem.9. A disk subsystem according to claim 8, wherein said second switchcircuit and said fourth switch circuit stop interchanging signalsto/from said plurality of first and second memory devices, signalinterchange between said second switch circuit and said fourth switchcircuit is stopped, said second switch circuit is disconnected from saidfourth switch circuit, said fourth disk controller is connected to saidfourth switch circuit and said second switch circuit and said fourthswitch circuit start interchanging signals to/from said plurality offirst and second memory devices, thereby completing connection of saidfourth disk controller to said fourth switch circuit.
 10. A disksubsystem according to claim 9 further comprising: a third inter-switchinterface used for interchanging signals between said second switchcircuit and said fourth switch circuit; and a fourth inter-switchinterface used for interchanging data between said second switch circuitand said fourth inter-switch interface, wherein said fourth switchcircuit has the function to connect two systems of disk controller orswitch circuit; said fourth switch circuit is connected to said secondswitch circuit and fourth disk controller; said third inter-switchinterface is used for disconnecting said second switch circuit from saidfourth switch circuit; and said fourth inter-switch interface isconnected to said fourth disk controller so as to be used forinterchange of data to/from said fourth disk controller.
 11. A methodfor controlling a disk subsystem having a plurality of first and secondmemory devices, first and second disk controllers for controlling saidplurality of first and second memory devices, a cache memory fortemporarily holding data to be stored in said plurality of first andsecond memory devices, a common memory for storing control information,first and second channel controllers connected to a host computer tocontrol input/output interfaces to/from said host computer, a firstcache switch connected to said first disk controller, cache memory,common memory, and first channel controller, a second cache switchconnected to said second disk controller, cache memory, common memoryand second channel controller, a first switch circuit connected to oneof said plurality of first memory devices and said first diskcontroller, a third switch circuit connected to one of said plurality ofsecond memory devices and said first switch circuit, a second switchcircuit connected to said one of said plurality of first memory devicesand said second disk controller, and a fourth switch circuit connectedto said one of said plurality of second memory devices and said secondswitch circuit, said method comprising the steps of: blocking said firstdisk controller in accordance with said control information; changingconnection of said first switch circuit and said third switch circuit toconnection of said third switch circuit and a third disk controller tobe connected to said first cache switch; releasing said first diskcontroller from blocking in accordance with said control information;and placing said third disk controller in usable condition in accordancewith said control information.
 12. A disk subsystem controlling methodaccording to claim 11, wherein the step of blocking said first diskcontroller includes the steps of: causing said first disk controller tostop receiving an access request from said host computer; anddisconnecting said first switch circuit from said third switch circuit.13. A disk subsystem controlling method according to claim 12, whereinthe step of disconnecting said first switch circuit from said thirdswitch circuit includes the steps of: causing said first switch circuitand said third switch circuit to stop input/output of signals to/fromsaid plurality of first and second memory devices; causing said firstswitch circuit and said third switch circuit to stop interchange signalstherebetween; and disconnecting said first switch circuit from saidthird switch circuit.
 14. A disk subsystem controlling method accordingto claim 11, wherein the step of changing connection of said firstswitch circuit and said third switch circuit to connection of said thirdswitch circuit and a third disk controller to be connected to said firstcache switch includes the steps of: connecting said third diskcontroller to said third switch circuit; changing said controlinformation; and causing said first switch circuit and said third switchcircuit to start interchange of signals to/from said plurality of firstand second memory devices.
 15. A disk subsystem controlling methodaccording to claim 11, wherein the step of blocking said second diskcontroller in accordance with said control information includes thesteps of: changing connection of said second switch circuit and saidfourth switch circuit to connection of said fourth switch circuit and afourth disk controller to be connected to said second cache switch;releasing said second disk controller from blocking in accordance withsaid control information; and placing said fourth disk controller inusable condition in accordance with said control information.
 16. A disksubsystem controlling method according to claim 15, wherein the step ofblocking said second disk controller includes the steps of: causing saidsecond disk controller to stop receiving an access request from saidhost computer; and disconnecting said second switch circuit from saidfourth switch circuit.
 17. A disk subsystem controlling method accordingto claim 16, wherein the step of disconnecting said second switchcircuit from said fourth switch circuit includes the steps of: causingsaid second switch circuit and said fourth switch circuit to stopinput/output of signals to/from said plurality of first and secondmemory devices; causing said second switch circuit and said fourthswitch circuit to stop interchange signals therebetween; anddisconnecting said second switch circuit from said fourth switchcircuit.
 18. A disk subsystem controlling method according to claim 15,wherein the step of changing connection of said second switch circuitand said fourth switch circuit to connection of said fourth switchcircuit and a fourth disk controller to be connected to said secondcache switch includes the steps of: connecting said fourth diskcontroller to said fourth switch circuit; changing said controlinformation; and causing said second switch circuit and said fourthswitch circuit to start interchanging signals to/from said plurality offirst and second memory devices.
 19. A disk subsystem controlling methodaccording to claim 15, wherein the control information stored in saidcommon memory has mounting status information and operating statusinformation concerning said first and second disk controllers.
 20. Adisk subsystem controlling method according to claim 19 furthercomprising the steps of: when said first disk controller is to beblocked, letting the operating status information of said first diskcontroller “blocked”; when said third disk controller is to beconnected, letting the mounting status information of said third diskcontroller “mounted” and its operating status information “normal”; whensaid first disk controller is to be placed in usable condition, lettingthe operating status information of said first disk controller “normal”;when said second disk controller is to be blocked, letting the operatingstatus information of said second disk controller “blocked”; when saidfourth disk controller is connected, letting the mounting statusinformation of said fourth disk controller “mounted” and its operatingstatus information “normal”; and when said second disk controller is tobe placed in usable condition, letting the operating status informationof said second disk controller “normal”.